[libre-riscv-dev] power pc

[Luke Kenneth Casson Leighton]

On Friday, October 25, 2019, Hendrik Boom <hendrik at topoi.pooq.com> wrote:

> On Fri, Oct 25, 2019 at 06:03:22AM +0800, Luke Kenneth Casson Leighton
> wrote:
> > On Thursday, October 24, 2019, Luke Kenneth Casson Leighton <
> lkcl at lkcl.net>
> > wrote:
> >
> > > https://libre-riscv.org/openpower/
> >
> >
> > Wrote up an idea on how to fit Compressed. There are only 11 bits
> available
> > for 16 bit ops which is really tight.
> >
> > Therefore the idea is to have up to 8 "pages" where each "page" may be
> > activated for up to 14 instructions, or permamently if 0b1111 is
> specified.
> >
> > OP0 and OP1 each have their own page specifiers and their own CSR bits.
> >
> > If the (measly) 11 bits were divided into 3 bits for opcode (then 2x 3
> bits
> > for registers or whatever, all TBD), that's 8 compressed instructions per
> > page per opcode.
> >
> > 8 x 3 x 2 gives a total of 48 Compressed 11 bit operations.
> >
> > Which is still tiny but better than nothing.
> >
> > The advantage of dual paging is that the most commonly used ones can be
> > activated and left on for any given function.
>
> Can the page specifiers nest?  So that if you have the page of commonly
> used ones active you could use one of the uncommon ones for an
> instruction and then be back to the commonly used ones?


That's a good idea. It's what I came up with when I was 20, except that was
a 8 bit instruction set variable data) Escape sequencing gone mad.

Turns out the scheme is similar to a commonly used software compression
algorithm.


> A limit on page specifier nesting is probably good.


Yes because you need a stack in effect, of:

* page number
* num instructions still active in that page

Page num is maybe 4 bits, length is 4 bits. That's 8 per stack entry.  4 of
those is 32 bit which is quite enough.

However as long as CSRs up to 64 bit exist that can do 2 channels. This all
has to be saved on context switch.

Also you need a "reset to standard PowerISA" opcode as well as a "back up
by 1" opcode.


> How do page specifiers interact with subroutine calls and jumps?


Been wondering about that for some time.

Terminate them ie reset back to default is the safest thing to do.

Conditional branches, definitely terminate (reset back to PowerISA).

Subroutines, probably likewise, because otherwise you need special
functions non-PowerISA and PowerISA.

Jumps are about the only thing it *might* be safe to allow.

However one thing, there is a cutoff (instruction countdown)

So it *might* actually be ok to just say "it's a software problem", as the
responsibility of the compiler writer.

L.



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