[libre-riscv-dev] power pc

whygee at f-cpu.org whygee at f-cpu.org
Wed Oct 23 12:09:40 BST 2019


On 2019-10-23 12:50, Jacob Lifshay wrote:
> Also, 32-bit floats are stored in the FP registers in 64-bit format
> (but otherwise behave like 32-bit floats should), this means it will
> be more complex to store multiple smaller FP values in a single FP
> register.

that makes the core draw more power than required, as well...
and a 32-bits core version is less straight-forward to design.



More information about the libre-riscv-dev mailing list