[libre-riscv-dev] power pc

[Luke Kenneth Casson Leighton]

I took a look at the ISA (P1146) and we do not need vectors (OP4 or OP60).
If tdi is moved to OP56, twi to OP60, and mulli to OP11, the entire 000 row
of 8 is clear for use as Compressed and escape-sequences for 48, 64 bit and
VBLOCK.
It will be very tight.

Jacob what's the deal with c++11 memory models? Why does that matter and
how is Power not able to cope?

L.



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