[libre-riscv-dev] power pc
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Sat Oct 19 00:48:09 BST 2019
So as you know, the RISCV Foundation is seriously impeding progress. There
is huge momentum around RISCV itself, however as far as open *innovation*
is concerned, the sheer arrogance of the Foundation in failing to respect
the combination of Libre goals and business objectives has us completely
isolated from key critical resources such as the closed secret lists and
We cannot even get access to documentation explaining how to propose new
I have been considering for some time to reach out to MIPS and PowerPC.
Yesterday I wrote to the OpenPower Foundation and was really surprised and
delighted to hear back from Hugh Blemings, whom I worked with over 20 years
I outlined some conditions (no NDAs, open mailing lists, use of
Certification Marks and Compliance Suites) and he replied back that this
was pretty much along the lines of what they were planning.
I will have a chat with him some time, in the meantime I found the spec:
It is eeenooormous, however Hugh reassures me that they want to break it
Why would we even consider this?
The lesson from RISCV is really clear: if the ISA is set up as a cartel,
Libre innovation is not welcome.
If we had a goal to just *implement* a *pre existing* Extension, there
would be no problem.
It is the fact that we wish to implement entirely new extensions, for CPU
and GPU *and* VPU purposes, but not as a separate processor (which would be
classified as "custom") that is the "problem".
So starting at page 1146, we need to work out how to shoe horn a ton of
stuff into the ISA, as well as fit 16 bit compressed in as well.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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