[libre-riscv-dev] multi issue

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri May 31 22:02:42 BST 2019


queue's working and is in place, now.   *for now* i am only pulling
one instruction out of the queue at a time, because the logic to
handle multi-issue isn't there yet: that will need to be the next
focus.

however, putting multiple entries *into* the queue is fine.

it works by allowing "inspection" of the instruction queue outgoing
data, so that the instruction engine can decide - BEFORE saying how
many instructions it can deal with - how many instructions it can deal
with.

the format at the moment is incredibly simple.  the following fields:
* 4-bit oper (2 bits ALU, 2 bits BR)
* src1 reg #
* src2 reg #
* dest reg #

err... that's it.

once we have that 64 (or more) "internal" instruction format, it can
be dropped in-place along with the RISC-V instruction decoder.

l.



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