[libre-riscv-dev] [Bug 87] New: investigate scoreboard global write pending change

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=87

            Bug ID: 87
           Summary: investigate scoreboard global write pending change
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

Created attachment 16
  --> http://bugs.libre-riscv.org/attachment.cgi?id=16&action=edit
show invert on global write vector

details:
http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-May/001525.html

needs a thorough investigation: the global write pending vector might be
possible to invert and AND with the FU's read pending vector:

      Readable = 0;
      for(i=0; i < 32; i++)
          Readable |= ~global_INT_Write_Pending[i] & Int_Read_Pending[i];

this would stop the readable signal from going HI even on idle.

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