[libre-riscv-dev] chinese sponsor, looking to design an ECP5-based dev board

[Luke Kenneth Casson Leighton]

On Tue, May 7, 2019 at 2:14 AM Samuel Falvo II <sam.falvo at gmail.com> wrote:
>
> This is entirely out of scope for the project at hand, I'm sure; feel
> free to summarily dismiss if it is.  But, if we're aiming to sell
> these separately from the larger libre-riscv project, I feel this
> might enhance the appeal to hackers over all.

 that was the idea... as long as it doesn't interfere with the primary
scope, which is that this is a board *specifically* being designed to
accelerate *our* completion timescales.

> Since this card is expected to be approximately the size of a credit
> card, I'm wondering if it would be possible to build the board with a
> set of edge connector pins along one edge, each (non-power) finger
> routed to an I/O on one of the FPGAs?  I'm thinking hackers can then
> build their own backplane solutions around these fingers should they
> want to use more than one board in a project.
>
> Another, perhaps more flexible, option is to use unpopulated,
> through-hole SIL or DIL pads.

 yes, i've designed those on the EOMA68 Micro-Desktop PCB for example.
unused pins from the EOMA68 (PCMCIA) header were routed through to a
2.54mm pitch 2x10 DIL header.

>  For example, if I multiplex address and
> data bus pins, I can implement a 16-bit off-chip Wishbone derivative
> (with 24-bit address bus) in about 40 pins, so figure 54 pins if you
> obey the rule of "1 ground/power pin per 3 data pins", but I'm willing
> to bet 50 pins would be more than adequate for quite respectable
> throughputs.  A 2x25 DIL connector would be 2.5 inches long, which
> seems to be just about the size of the long edge of a Raspberry Pi.

 25 x 2.54 = 63mm, it's just barely doable, yes.  20-pin would be
2.5in.  unless you means 2mm pitch.

> I'm somewhat motivated by my own selfish desires, but also (if you see
> the attached image) by the presence of similar kinds of pads on small
> boards like my icoBoard Gamma (see the red arrow).  This is a 17x4
> matrix of pads offering 64 bits of raw I/O and 4 power.  In a perfect
> world, having at least two PMOD ports would be nice as well (in my
> Kestrel project, I use one PMOD for two UARTs, one for PS/2 keyboard,
> one for PS/2 mouse, one for diagnostics, and I was planning on using
> the 17x4 pin matrix for things like audio and VGA breakout, so you can
> see how heavily I depend on PMODs!).

 oo i like those snap-on B2B connectors.  hardkernel (known famously
for the iconic Odroid series) use them to good effect, particularly
for snap-on eMMC / SD-MMC modules.

 you do have to be careful with them, they're very small, and they
don't exactly have a high plug / un-plug count.  forget the term.
25-50 connect/disconnect cycles is sort-of around what can be
expected... and they're SMT mounted.  too much force and the connector
will rip right off the board.

 so be very careful taking breakout PCBs on and off the icoBoard ok!

> There are also high-density connectors (one of four of which are
> circled in green) which, IIRC, provides a 32-bit I/O path.
>
> I just wanted to bring this up because it was the icoBoard's sheer I/O
> accessibility that attracted me to that board.  I could be an anomaly
> though.  :)

 :)

 the number of unused pins from 2x ECP5s may actually be so high that
we can't get them off-PCB without using those 0.5mm pitch B2B
connectors.

 i'll have the conversation with the sponsor, see if they are happy to
step outside of the credit-card-sized form-factor a bit, to put in
rows of 2.5, 2.0 or 1.0 mm DIL headers.

 we do want to be able to do some additional peripherals (SD/MMC,
RGB/TTL, UARTs, SPI, I2C etc), and the easier that is to do, the
better.

l.