[libre-riscv-dev] Introduction

[Samuel Falvo II]

On Thu, May 2, 2019 at 5:38 PM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

>  is that... are you storing *only* the modifiable bits, to save gates?
>  if so, cool!
>

I am indeed.  That's one of my beefs with the priv-spec as it's currently
written; so many registers have WPRI fields, and I'm just baffled as to why
we need the vast majority of mstatus to be garbage/scratch register space.
Considering the sheer importance of mstatus, I'd expect that it would be
mostly hardwired values if a bit field isn't supported.  I look at things
from an FPGA perspective, especially those which Yosys tools can target,
which are not that large.  Both LCs and DFFs are at a premium.
Implementing the 53000B on an iCE40HX8K is going to be my greatest
challenge, I think; the CSRU already takes up 1/6th the chip's resources.
:(

 that can be just
>    for i in range(self.o_dat.nbits):
>

Thanks.  I'll take a look soon.

-- 
Samuel A. Falvo II