[libre-riscv-dev] TLB key for CAM
flyingmonkeys1996 at gmail.com
Tue Mar 12 02:39:43 GMT 2019
I have gotten the CAM working as well as I want to with both a one
cycle read and write. All operations verified through the unit test as
well which is cool. More tests in the future but for now I think it is
>From what I understand key of the CAM in the TLB should be the VMA.
However, this may cause collisions as multiple processes use the same
address for many things. Should the policy be to simple replace the
colliding entry? For instance process 1 caches VMA 0x01. Then process
2 get control and looks for VMA 0x01. It will have a hit in the CAM,
but, the ASID will be incorrect and we will replace that entry. At
least that is what makes sense to me. Otherwise we may end up with
multiple entries in the CAM for the same key which would be bad!
I was also toying with the idea of using the VMA + ASID as the key and
never have any collisions. But I believe that destroys the idea of
global mappings so probably not haha.
Let me know what you guys think.
Anyways ever forward,
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