[libre-riscv-dev] Wish to work on

[Rishabh Jain]

Thanks for welcoming me :)

I have read the charter and found it very sensible. I will obey the "Code
of Honour".
For installing yosys and nmigen:
I have cloned the *yosys* repo from https://github.com/YosysHQ/yosys and
ran make, make tests and sudo make install.
And cloned the repo of *nmigen* and installed using " pip install git+
https://github.com/m-labs/nmigen.git "
These tools look interesting.

In the soc/TLB/src directory: I changed python3 to python3.6 in Makefile.
After doing make, I got this console log : "python3.6 Cam.py generate -t v
> Cam.v"

In my computer, python3 default is set to 3.5 version. I looked into
modifying this:
https://askubuntu.com/questions/900493/how-to-change-python3-from-python3-5-to-python3-6
But, I fear my system will break. So, better I will manually call
python3.6.

Luke, can you give me an overview/brief on the 'soc' repository?














On Wed, Mar 6, 2019 at 1:28 PM Rishabh Jain <rishucoding at gmail.com> wrote:

> Hello everyone,
>
> I am Rishabh Jain. I have completed my undergraduate studies in Electrical
> and Electronics Engineering in December 2018.
> Previous summer, I worked with luke on the pinmux project while I was
> pursuing a summer internship at IIT Madras.
>
> I have experience of programming in Python, C, java, verilog, assembly and
> bluespec, but I am ready to learn new languages and tools as part of the
> ongoing project here.
>
>  May someone give a brief on the ongoing projects and how to get started?
>
> Thanks and regards,
> Rishabh Jain
>
>
>
>