[libre-riscv-dev] SV Prefix questions
Jacob Lifshay
programmerjake at gmail.com
Wed Jun 26 10:39:42 BST 2019
On Wed, Jun 26, 2019 at 2:33 AM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
>
> On Wed, Jun 26, 2019 at 10:22 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
>
> > On Wed, Jun 26, 2019, 01:36 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> > wrote:
>
> > vsetvli's immediate starts at bit 15, not bit 20. for rvv that allows
> > specifying more immediate bits. note that rvv may reserved some of the
> > upper immediate bits and they may be later used by new brownfield-encoded
> > instructions, so we should avoid setting the upper bits unless necessary.
>
> i believe they already use it for encoding vew and other "stuff".
>
> > > * rvv's vsetvli appears to be absolutely no different from vsetvl
> > >
> > bit 31 is the differentiating factor
>
> yes. however, in the variant list at
> https://libre-riscv.org/simple_v_extension/specification/sv.setvl/
> it's not used at all, because the algorithm instead uses rs1==x0 for
> detection purposes.
>
> a potential there is to use that bit 31 for what it's intended
> (mirroring vsetvl's usage) and then reserving rs1==x0 for another
> potential brownfield encoding.
bit 31 is for differentiating rs2/imm, which is not needed for SV,
therefore I picked the vsetvli encoding hoping to allow
implementations that implement both rvv and SV to share more gates in
the decoder. rs1 handling matches how it's defined in rvv.
>
> what do you think?
>
> l.
>
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