[libre-riscv-dev] SV Prefix questions

[Jacob Lifshay]

On Wed, Jun 26, 2019, 01:36 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> ---
> crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
>
> On Wed, Jun 26, 2019 at 9:16 AM Jacob Lifshay <programmerjake at gmail.com>
> wrote:
> >
> > I tried to write a reduction calculation that uses the balancing the
> > last two iterations part of setvl and I discovered that it works just
> > fine without that. Therefore, I think we should switch the algorithm
> > to the following:
> > let mut regs = [0u64; 128];
> > let mut vl = 0;
>
>  ... added:
>  https://libre-riscv.org/simple_v_extension/specification/sv.setvl/
>
>  can explore it there.
>
>  fitting with that algorithm:
>
>  * bits 24..20 clearly fit MAXVL.
>  * bits 19..15 (rs2) just as clearly have no purpose whatsoever for
> sv.setvl :)
>
vsetvli's immediate starts at bit 15, not bit 20. for rvv that allows
specifying more immediate bits. note that rvv may reserved some of the
upper immediate bits and they may be later used by new brownfield-encoded
instructions, so we should avoid setting the upper bits unless necessary.

>  * rvv's vsetvli appears to be absolutely no different from vsetvl
>
bit 31 is the differentiating factor

>
>  i managed to fill in 4 of the possible 8 permutations (from the
> pseudocode), it works well, basically, when rs2==0, it's a "sv.setvl
> or sv.setvli", and if rs2 != 0, that can be used as a (scalar) opcode.
>
> l.
>
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