[libre-riscv-dev] [Bug 92] Implement in order instruction retire refcounting

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=92

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
An augmentation of this concept, if the number of instructions issued does not
equal the number of write ports.

The round robin index to be inserted into each stripe can be modulo the number
of write ports.

2 instructions issued, 6 stripes, 4 write ports, the target write port numbers
to use are 0 into stripe 0, 1 into stripe 1.

On the next clock, 4 issued: 2 into stripe 2, 3 into stripe 3, 0 into stripe 4,
1 into stripe 5.

And do on.

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