[libre-riscv-dev] ModuleNotFoundError in soc.git

[Luke Kenneth Casson Leighton]

On Sun, Jun 16, 2019 at 2:18 PM Tobias Platen
<hacks2019 at platen-software.de> wrote:

> I've begun reading the PDFs and other RISC-V documentation,
> and in the next few days I will read the source code of the
> soc and the ieee754fpu.

 super.  i'm kinda amazed that there's so much, already.

 for the ieee754 code, i recommend starting with the FSM-based
ieee754fpu modules, they're simpler to understand:
 * ieee754/fpmul/fmul.py
 * ieee754/fpadd/fadd_state.py
 * ieee754/fpdiv/nmigen_div_experiment.py

 and once those make sense, the sub-divisions into classes that
*construct* pipelines, and the shared classes (fpcommon) also will
make sense.


> I tried to run the tests included
> in the soc, but I got multiple ModuleNotFoundError errors.

 yyyeah, this is not a surprise :)  do a git pull i've fixed several of them.

 btw if you do the same test-running with the ieee754 fpu code, it's
*not* designed to work that way: many of the unit tests simply will
not end, or will take hours to days to complete.

 run them manually, instead:

 * python3 ieee754/fpdiv/test/test_div.py
 * python3 ieee754/fpmul/test/test_fpmul_pipe.py
 * python3 ieee754/fpadd/test/test_add.py
 * python3 ieee754/fpadd/test/test_fpadd_pipe.py

that will create a few gtk files (use gtkwave to view)

 however to do so you'll need to install sfpy and berkeley softfloat-3
from source, both of which require some miiinor patching.  i
documented that in the ieee754/README.md - it's a bit of a pain.

 you *can't* use the standard sfpy package, because it's compiled by
default to emulate *INTEL* processor IEEE754 FP, and RISC-V IEEE754
NaN and Inf handling is *different* from x86 IEEE754.

 makes a mockery of the whole concept of IEEE754 being a "standard" *sigh*...


> All other test pass without any errors.

superb.

the "big" ones can be run manually, if you want to test the 6600
scoreboard work:
$ cd soc/src/experiment
libreriscv/soc/src/experiment$ python3 score6600.py

you can edit scoreboard_sim() to add in some of the regression tests,
comment out others.  the one to try is the "random" one.  change "if
False" to "if True: ...create_random_ops()...."

as you can see from the one with is currently enabled with "if True:",
i'm presently working on the LD/ST infrastructure.

you will then get some gtw files generated, which you can view with gtkwave.

> This is my test environment:
>
> Debian Buster (testing)

 ah this is a lot easier, a lot less work.

> Python 3.7.3
> git version 2.20.1
> migen git

 should be nmigen git

> Yosys 0.8+531 (git sha1 d4f77d40, clang 7.0.1-8 -fPIC -Os)

if that's latest (ish) master it should be fine.  nmigen hits yosys
sufficiently extensively that it's been known to find bugs that
require latest (ish) master.

oh, yes, "apt-get install gtkwave" - then you can open some of the
files and view the signals of the simulations as they execute.

l.