[libre-riscv-dev] KCP53000B micro-architecture thoughts
Samuel Falvo II
sam.falvo at gmail.com
Sun Jun 2 21:40:05 BST 2019
On Sun, Jun 2, 2019 at 12:27 PM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> It sounds like you are merging (moving) the functionality that should be in
> the CU into the FU, which should be fine as long as it really is the same.
I find the division of labor between the CU and FU to be challenging
to keep straight. It's entirely possible that I'm getting it quite
wrong; after I'm done with my first cut design, I'll need to re-read
the Mitch Alsup chapters. As it currently stands, I can see myself
implementing four tiers of logic:
1) The raw data processing logic.
2) The state machine that actually drives the processing logic (if required).
3) The FU logic and/or sub-state machines that is local/unique to the
CU (if required).
4) The FU state machine that interacts with the scoreboard's
It seems like Mitch considers layers 1+2 to be a CU, and 3+4 to be the
FU. However, right now, I'm considering layer 1 to be the CU, 2+3 to
be the FU, and 4 to be the instruction dispatcher.
No matter how this comes out, it'll be neat to compare notes
afterwards. If it lets me fit a complete RV64I out-of-order processor
into less than 5500 logic cells on an iCE40HX8K, I'll consider my
first attempt at this a resounding success. ;-)
> Yes, please, do, if the CU is not a 6600 style CU, as it already caused
Will make the adjustments. Thanks for the feedback!
Samuel A. Falvo II
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