[libre-riscv-dev] [Bug 119] New: Zero and sign extension blocks are needed, FP.and INT

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=119

            Bug ID: 119
           Summary: Zero and sign extension blocks are needed, FP.and INT
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: ALU (including IEEE754 16/32/64-bit FPU)
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

Both FP and INT need zero/sign extension blocks, for use at appropriate points
in the pipeline. SV requirements need to be taken into account.

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