added the rest of DivPipeCore* https://git.libre-riscv.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/div_rem_sqrt_rsqrt/core.py;h=b52c89488311768838d6a2a0f944a83500cce35d;hb=269f8b1aaefb682e2d0c57729b357cd30919e612 will add tests tomorrow, need to sleep