[libre-riscv-dev] div/mod algorithm written in python
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Fri Jul 5 11:59:11 BST 2019
i've added the z-bypass signals (out_do_z, oz) and also the context
(FPPipeContext) - all commented-out - as they need to be initialised
these have to go into absolutely every data spec because they're
passed (untouched) right the way through the pipeline. bit annoying,
* the muxid *must* be unmodified. it's the Reservation Station identifier.
* out_do_z and z are set in SpecialCases. they must not be touched by
any "processing", as they already contain a result
* ctx.op is where you can completely change the functionality of the
pipeline: it's the ALU "operator", from the instruction decode phase
(or is funct7, or... whatever).
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