[libre-riscv-dev] Introduction

[Luke Kenneth Casson Leighton]

Btw Aleksander, I just wanted to say that I am very grateful that you want
to help get this project underway, and that you can do HDL.

I can *read* HDLs, and I did design a custom ASIC once, with help from an
associate... the only thing being, we had to design it entirely at the gate
level (!) by translating the c code version, together.

Also as you probably saw by now on comp.arch I can do high level design of
architectures, again, if assisted by experts who really know their stuff.

That's basically the pattern: as a team we will be able to get this
processor done, and you bring some critical expertise which is not so much
what you've already done as it is the ability to adapt and absorb.

Luckily, python is pretty clear :) If you are not already using colour
syntax highlighting I strongly recommend it, the colour triggers one
hemisphere of the brain and the words trigger the other.

L.


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crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68