[libre-riscv-dev] IEEE754 FPU
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Feb 25 08:24:57 GMT 2019
On Mon, Feb 25, 2019 at 8:12 AM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> * output STB must go LOW before input STB can be raised
> * output's ACK must ONLY be sent HI when INPUT's ACK is LOWERED.
>
> it's almost as if the STB and ACK signals actually have to be inverted.
oh ha haa haaa, very funny: that worked :)
however - and this is the really interesting bit: it's necessary to
wait for the *internal* stb (between add1 and add2) before proceeding
with writing c into add2.
i'm basically floundering around here. this kind of logic analysis
is something i am simply not good at!
l.
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