[libre-riscv-dev] IEEE754 FPU

[Luke Kenneth Casson Leighton]

ok i think i have an insight.  at the moment i am simply passing
through (connecting back-to-back) the "STB" and "ACK" signals between
the 1st adder's "z" output and the 2nd adder's "b" input.

i suspect that this is the wrong thing to do, that instead, some sort
of logic involving testing of the stb signals and waiting for certain
conditions to be achieved before raising (or forwarding) the ack
signals (either way).

in particular it *might* be necessary to wait for the ack to go low
(or high) before sending the STB.  i.e. only on a transition from low
to high is it ok to assert STB.

or: it may be this:

* output STB must go LOW before input STB can be raised
* output's ACK must ONLY be sent HI when INPUT's ACK is LOWERED.

it's almost as if the STB and ACK signals actually have to be inverted.

l.