[libre-riscv-dev] IEEE754 FPU

[Luke Kenneth Casson Leighton]

ok so thank you aleksander, i have a bit of a clearer idea now, to use
that ack/stb trick.  the only thing is, i haven't yet *used* that
pattern anywhere, so am not sure how to do it with nmigen

whilst the fpus *implement* the ack/stb pattern, that's not the same
as *using* it.

so to do that, i figured, well... why not take the nmignen alu_hier.py
example and make an actual FPU? it would need to *use* the ack/stb
pattern (and it would need to use say the adder as a module).

it's a stepping-stone: one thing at a time.  it doesn't involve
breaking the adder, it learns how to do ack/stb, then we can *use*
that to split out say the normalise_1/2, round, corrections and pack
phases into a separate module.

thoughts?

l.