[libre-riscv-dev] IEEE754 FPU
Aleksandar Kostovic
alexandar.kostovic at gmail.com
Sat Feb 16 11:00:54 GMT 2019
>
> ok so i was quite annoyed with myself for not letting *you* make the
> corrections to the code that you'd written, as it actually violates
> the libre-riscv charter.
You dont have to worry! Its good this way. You correct what i missed and
that way i actually know what changed. so again no worries.
i've split out the code from the adder into a base class: if you'd
> like to do multiplier it should be much easier to start from copying
> the add python code and replacing the special_cases, add_0, add_1
> stages.
> i'd like to try doing the divider, if that's ok?
You are so fast! *is not used to this pace*
Yeah i will try multiplier and you do devider :)
We got this!
On Sat, Feb 16, 2019 at 11:45 AM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:
> On Sat, Feb 16, 2019 at 5:59 AM Luke Kenneth Casson Leighton
> <lkcl at lkcl.net> wrote:
>
> > so i have an idea: would you like to do the multiplier conversion? if
> > you do a "diff -u" on jon dawson's multiplier.v and adder.v there's
> > actually surprisingly very little difference between the two.
>
> i've split out the code from the adder into a base class: if you'd
> like to do multiplier it should be much easier to start from copying
> the add python code and replacing the special_cases, add_0, add_1
> stages.
>
> i'd like to try doing the divider, if that's ok?
>
> l.
>
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