[libre-riscv-dev] [isa-dev] Re: SV / RVV, marking a register as VL.
luke.leighton at gmail.com
Sat Aug 31 05:56:57 BST 2019
On Saturday, August 31, 2019 at 9:02:35 AM UTC+8, Dan Petrisko wrote:
> > I assume here that adds are more useful than anything else except what is available now.
> Atomic adds are also significantly more expensive (gates) than other CSR operations.
In both rocket-chip and ariane they are implemented as a special FSM built-in to the L2 cache communications layer!
> Since CSRs operations are not typically performance critical,
eexactly, and VL particularly on vbff not only reads VL it writes a new value to it, as well.
Which then makes subsequent (necessary) use of CSRR the exception to all the rules about CSRs.
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