[libre-riscv-dev] SV / RVV, marking a register as VL.
luke.leighton at gmail.com
Thu Aug 29 12:09:06 BST 2019
(taking isadev off cc for this one)
On Thursday, August 29, 2019, lkcl <luke.leighton at gmail.com> wrote:
that would then allow the substituted-instruction to go directly into
> dependency-tracking *on the scalar register*, nipping in the bud the need
> for special CSR-related dependency logic, and no longer requiring the
> sub-par "stall" solution, either.
The "cache" idea where a CSRR is rewritten to a MV is the key
implementation piece of the puzzle that I think means we can go ahead with
sv.setvl being a pointer-to-a-register rather than a CSR.
Any thoughts on this one, Jacob (to isadev and lrv), any objections, or do
you need time to think about it?
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