[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Thu Aug 15 03:41:28 BST 2019
http://bugs.libre-riscv.org/show_bug.cgi?id=132
--- Comment #21 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #20)
> (In reply to Jacob Lifshay from comment #15)
> > (In reply to Luke Kenneth Casson Leighton from comment #13)
> > > Going to need some examples.
> >
> > see
> > https://salsa.debian.org/Kazan-team/simple-barrel-processor/blob/master/test/
> > test_multiply.py#L65
> >
> > the second constructor arg is converted to a PartitionPoints instance
> > internally.
>
> Ok, can those two signals (nibble, byte) be made runtime selectors? Or are
> they, already?
They are already.
> So only two bits perform the partitioning, not 64 bits.
actually, in that example, 3 bits perform the partitioning, one is just defined
to be the OR of the other two.
Any single-bit nmigen Value will work.
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