[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Wed Aug 14 23:43:58 BST 2019


--- Comment #20 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #15)
> (In reply to Luke Kenneth Casson Leighton from comment #13)
> > Going to need some examples.
> see
> https://salsa.debian.org/Kazan-team/simple-barrel-processor/blob/master/test/
> test_multiply.py#L65
> the second constructor arg is converted to a PartitionPoints instance
> internally.

Ok, can those two signals (nibble, byte) be made runtime selectors? Or are
they, already?

So only two bits perform the partitioning, not 64 bits.

Will take a closer look at the mul code later today after some rest.

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-riscv-dev mailing list