[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Wed Aug 14 23:18:19 BST 2019


--- Comment #18 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #17)
> (In reply to Jacob Lifshay from comment #14)
> > (In reply to Luke Kenneth Casson Leighton from comment #12)
> > > (In reply to Jacob Lifshay from comment #11)
> > > 
> > > > > 
> > > > > If the code is not doing single cycle results we cannot use it.
> > > > 
> > > > yes we can, we just need to tell the pipeline API "this takes 3 stages
> > > > instead of one, so insert extra registers on the control signals"
> > > 
> > > Which still does not take care of cancellation.
> > 
> > it's a simple data pipe, if a particular element is canceled, that pipeline
> > slot will just be empty, just like divpipecore. the control pipeline can
> > keep track of which elements have valid data and which have been canceled.
> > 
> > > 
> > > The multiplier code will now need to implement cancellation, which is a
> > > global mask (not a register-propagated signal).
> > the surrounding control hardware will just set the associated control
> > signals such that the canceled/unused data elements are ignored.
> > 
> Which has the knock on ramifications of underutilised hardware (stages that
> run empty) which either decreases the IPC count or requires more RSs to
> conpensate.

it decreases IPC, which is what happens anytime an instruction is canceled, the
partially completed instruction used (before it was known that it was to be
canceled) hardware that could have been used to run other instructions had it
known. Unfortunately, computers don't have a time machine to allow them to know
which instructions end up being canceled ahead of time.

adding more RSs is not a solution even ignoring the extra scheduler hardware
because each instruction has to finish each stage in sequence so the signals
used by succeeding stages are calculated.

So, even if a element is canceled in a later stage, there aren't any
instructions that could fill the unused slot because none of them have
progressed far enough to be able to fill the slot.

basically, once the instructions are assigned to slots in the first stage, your
stuck, there isn't (normally) a way to insert more instructions later to fill
unused slots.

Note that the slots I'm referring to are element time slots.

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