[libre-riscv-dev] implementing the TLB Replacement Policy
Tobias Platen
hacks2019 at platen-software.de
Tue Aug 13 20:43:51 BST 2019
I began working on the unit test for the still incomplete TLB.
When I looked into the write_l1 method I saw that only the
first CAM entry is updated, all others are never changed.
I have just started reading
https://www.bottomupcs.com/hardware_support_for_virtual_memory.xhtml
but that does not explain how to implement a TLB Replacement Policy.
I will have to think a few days before implementing anything.
Once that is done I will implement write_L2.
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