[libre-riscv-dev] [isa-dev] Re: FP transcendentals (trigonometry, root/exp/log) proposal

lkcl luke.leighton at gmail.com
Fri Aug 9 04:38:43 BST 2019

On Thursday, August 8, 2019 at 11:58:17 PM UTC+8, MitchAlsup wrote:
> We are talking about all of this without a point of reference.
> Here is what I do know about correctly rounded transcendentals::

I'd spotted that you mentioned these earlier, thank you for reiterating them.

> My technology for performing transcendentals in an FMAC unit performs a power series polynomial calculation.

> If you impose the correctly rounded requirement:: 
> a) the size of the coefficient tables grows by 3.5× and 
> b) the number of cycles to compute grows by 1.8×
> c) the power to compute grows by 2.5×
> For a gain of accuracy of about 0.005 ULP

To put this into perspective: 3D GPU FP Units make up sonething mad like a staggering 50% of the total silicon.

So in the highly competitive mass volume 3D GPU market, where full accuracy is non-essential, that would mean entering the market with a product that had the power performance characteristics with a 3 year old profile [at the price point of a modern competitor]

It would be stone cold dead long before it entered design, and no sane VC would fund it.

However in the UNIX Platform profile, where the FPU is ratchetted back to not completely dominate the chip, the impact of higher accuracy is far less, and the needs of customers far different anyway.

As you can see from the offline message I received, the 3D Embedded Market is even weirder, and market forces and customer needs drive in *completely* the opposite direction.

3D is just completely different from what people are used to in the [current] RISCV Embedded and Unix platforms.


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