[libre-riscv-dev] MAXVECTORLENGTH could be longer

[Jacob Lifshay]

The current SimpleV spec defines MAXVECTORLENGTH as XLEN - 1 producing 31
and 63 on RV32 and RV64 respectively. I think it would be better to have it
be just XLEN as there is enough space in the registers used for predication
and you can easily get more than 64 elements by operating on packed 8-bit
elements or by using the extended (past r31) registers.

Comments?

Jacob Lifshay