[libre-riscv-dev] HDL selection

[lkcl]

On Wed, Nov 21, 2018 at 5:09 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
>
> On Tue, Nov 20, 2018 at 8:02 PM lkcl <lkcl at libre-riscv.org> wrote:
> >  myhdl, you actually have actual python code instead of an object
> > tree, where the python code has to be converted to python AST, and the
> > python AST is passed to a language translator that happens to output
> > verilog.
> >
> That's one of the reasons that I didn't want to use MyHDL since python is
> not designed to be a HDL, I would say that MyHDL is abusing Python's
> syntax, making it a confusing combination of an HDL and Python.

 i love it :)  except for the fact that trying to create a dynamically
adjustable
 (parameterised) class is flat-out impossible.

 i tried to create a priority mux/decoder for about 10 days in MyHDL, and
 had to give up.  i came to the conclusion that the only way to do it would
 be to actually *auto-generate* MyHDL code (from e.g. python)

>  Migen, by
> contrast, keeps the HDL portion separate from Python's syntax, allowing
> more design freedom.

 https://github.com/m-labs/migen/blob/master/migen/genlib/coding.py#L97-L98

 that's a priority encode/decode.  the "width" parameter is what i tried to
 do for about 10 days in MyHDL.   the Encoder class basically works like this:

 * if input = 0bXXX1, output = 0
 * if input = 0bXX10, output = 1
 * if input = 0bX100, output = 2
 * ....

and the decoder the other way round.  input = 0 -> output = 0b0001,
1=0b0010 and so on.

the nice thing being, you can pass in an arbitrary width.

l.