[Libre-soc-isa] [Bug 1183] add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Oct 12 21:39:20 BST 2023


https://bugs.libre-soc.org/show_bug.cgi?id=1183

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #6)

> I expect you'll end up with something like:
> 
> for i in range(VL):
>     if CR[i].lt:
>         RT[i] = RA[i] + RB[i]
>         pred = nothing-really
>     else:
>         pred = SNZ
>     # nothing uses pred!

this pseudocode is wrong, it is not how SNZ works with
DDFF. please read the spec pseudocode and if nothing
else ISACaller.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the Libre-SOC-ISA mailing list