[Libre-soc-isa] [Bug 1181] New: ask the ISA WG to produce a list of which instructions are needed by SFS and SFFS in 64-bit mode

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Oct 10 19:17:41 BST 2023


https://bugs.libre-soc.org/show_bug.cgi?id=1181

            Bug ID: 1181
           Summary: ask the ISA WG to produce a list of which instructions
                    are needed by SFS and SFFS in 64-bit mode
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Specification
          Assignee: lkcl at lkcl.net
          Reporter: programmerjake at gmail.com
                CC: libre-soc-isa at lists.libre-soc.org
   NLnet milestone: ---

it isn't clear what instructions are needed by SFS and SFFS in 64-bit mode, I
think we should submit a rfc or something to clarify that. e.g. are 128-bit
atomics required by 64-bit mode? (it would be nice if they are since gcc/clang
enable them by default on powerpc64le-linux-gnu; also since once cache line
pinning is implemented, reading/writing 128-bits isn't too horribly difficult)
what about bpermd or pdep/pext?

I also think BE-mode should be optional for 64-bit cpus.

imo the best option is to introduce new SFS64 and SFFS64 compliancy levels.

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