[Libre-soc-isa] [Bug 213] SimpleV Standard writeup needed

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Nov 18 15:59:06 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=213

--- Comment #97 from cand at gmx.com ---
You're right that I missed the option to ignore an element, however adding that
only makes it 5^4 = 625 options, which fits in 10 bits instead of 12.

Wrt your move example, I'm not getting why the move is necessary.
SUBVL=2 fadd v2.YZXX, v3.XWXX, v4.YWXX
SUBVL=2 fmv v3.XWXX, v2.YZXX

Why not directly
SUBVL=2 fadd v3.XWXX, v3.XWXX, v4.YWXX
?

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