[Libre-soc-isa] [Bug 560] big-endian little-endian SV regfile layout idea

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=560

--- Comment #8 from Jacob Lifshay <programmerjake at gmail.com> ---
basically, it will make the in-memory layout of vector types identical to the
in-register layout.

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