[Libre-soc-dev] Your FOSDEM 2024 talk titled 'Cologne Chip GateMate FPGA -- filling a gap between hardware and software (with a presentation of the GMM-7550 module)'

[Luke Kenneth Casson Leighton]

On Sat, Feb 10, 2024 at 11:27 PM Anton Kuzmin <ak at gmm7550.dev> wrote:
>
> Hi Luke,
>
> For some reason, my reply didn't go through on Feb, 7th,
> it's repeated below.

got it. as list admin i approved the cc post to libre-soc-dev list.
if you sent to me privately, email is unlikely to get through.
(long story)

> A.
>
> Subject Re: Your FOSDEM 2024 talk titled 'Cologne Chip GateMate FPGA --
> filling a gap between hardware and software (with a presentation of the
> GMM-7550 module)'
>  From   Anton Kuzmin
> To      Luke Kenneth Casson Leighton
> Date    Wed 00:17
> Hello Luke.
>
> On 2024-02-06 04:27, Luke Kenneth Casson Leighton wrote:
>
>      hi anton as you can see your video was uploaded and the review
>      can be done, marking the start and end point. once someone
>      does that (you!) it can go on the schedule?
>
>
> That's already done last night.

excellent

>
>      so sorry i didn't get a chance to meet you. i wanted to talk
>
>
> Unfortunately, we missed this opportunity to see each other
> in person, maybe next time [somewhere].
>
>      about the possibility (sponsored, NLnet) of doing a run of
>      gatemate boards using the largest FPGA that they have,
>      and an external multi-IC HyperRAM Module to get up to 512 mb RAM?
>
>
> Sounds interesting and I do not immediately see any problem.
> Just two questions right away: 512 MiB (half GiB)

yes.

>  or just 64 MiB

try running linux in that. latest kernels - latest *kernels* let alone
any userspace applications running *under* that linux kernel  -
barely fit into 64 Megabytes of RAM.

> (512 Mbit)?  And why HyperRAM

because the HDL is about 150 lines of code and was
operational in under 2 weeks flat on not just one FPGA
but two completely separate ones.
https://libre-soc.org/HDL_workflow/HyperRAM/

by contrast:  2 *years* of trying to get DDR3 operational
(thousands of lines of complex HDL) has been unsuccessful so far,
and SDRAM1 is a parallel bus which takes up too many
wires.



> -- that seems to be somewhat niche
> and targeted primarily to automotive?  Would Infineon
> S80KS5123 be suitable?

likely the S80KS5122 but you'd need to check. there's
already a Quad HyperRAM PMOD from 1bitsquared.de
with full source code of the PCB


> FYI, since I saw some interest in buying the module
> on ORconf'23, I'm trying to setup a campaign at GroupGets, but
> there are still a few things to address, both technical and
> businesswise.

indeed :) well applying for an NLnet grant would help at
least cover the technical aspects and get the PCB(s) funded.
i can introduce you to someone who can help with the
(simpler) HyperRAM PMOD PCBs?

l.