[Libre-soc-bugs] [Bug 982] Support PowerPC ABI in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=982

--- Comment #95 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/fu/trap/main_stage.py;h=8127e226#l375

 364             with m.Case(MicrOp.OP_SC):
 374                 # jump to the trap address, return at cia+4
 375                 self.trap(m, 0xc00, cia_i+4)
 376                 self.msr_exception(m, 0xc00)

ok this is the HDL implementation of sc, which needs the unit test i
started attempting to describe in comment #94.

HDL testing through the TestAPI  *needs* ISACaller to compare against
and make sure that the MSR and PC are correct.

therefore we *cannot* have an unconditional redirection of sc instruction
(if asmop == "sc") because otherwise how can we test the HDL?

therefore... that flag (user_emu_syscall or whatever) is necessary
and ultimately must be propagated through to pypowersim command-line,
*exactly* as how you execute qemu-user vs qemu-system.

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