[Libre-soc-bugs] [Bug 236] Atomics Standard writeup needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=236

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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           Assignee|addw at phcomp.co.uk           |programmerjake at gmail.com

--- Comment #8 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #7)
> (In reply to Jacob Lifshay from comment #5)
> > imho we should also introduce fused atomic/fence ops, where the atomic
> > instruction is also a memory fence, like risc-v and armv8 and x86_64, this
> > would reduce the number of needed instructions for an acq_rel atomic add to
> > 1, rather than the 5-7 with a 4-instruction loop we currently have.
> 
> ok, brilliant, can you create a page and design them?  keep it simple
> and straightforward, bear in mind i can help in a limited way as i
> don't fully grasp these instructions, and they need some serious
> justification to put to the ISA WG.

yeah, i can work on it, though it'll happen after the fadd formal stuff.

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