[Libre-soc-bugs] [Bug 857] binutils: provide tests for setvl/svstep/svshape/svremap

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=857

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://sourceware.org/pipermail/binutils/2022-June/121337.html

this needs a little work, dmitry:

* main spec https://libre-soc.org/openpower/sv/
* svp64 https://libre-soc.org/openpower/sv/svp64
* setvl https://libre-soc.org/openpower/sv/setvl/
* remap https://libre-soc.org/openpower/sv/remap/

SV (Simple-V) is a strict RISC-paradigm Scalable Vector Extension for the Power
ISA. SVP64 is the 64-bit Prefixed instruction format implementing SV. Funded by
NLnet through EU Grants No: 825310 and 825322, SV is in DRAFT form and is to be
publicly submitted via the OpenPOWER Foundation ISA Working Group via the
newly-created External RFC Process.

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