[Libre-soc-bugs] [Bug 864] implement parallel prefix reduction in simulator
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Jun 21 21:17:01 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=864
--- Comment #2 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #1)
> first version including a "yield" version which does not require
> a move operation.
>
> https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/preduce.py;
> h=5fb4f26f6d349e5fdf0d15cb50f66a4da6fa40e4;
> hb=13c4a19e93caf4dc817c508f70f3af42749a7a87
try testing with a predicate of [0,0,0,0,1,1,1,1], you'll see that element 0
(the expected output by the compiler) never gets written to, hence why moves
are necessary.
also, you can think of reduction as doing operations where the predicates are
on each element operation's *inputs* rather than its outputs, so, obviously it
needs to do something different when one input is predicated off and the other
input is still on -- move (or something similar -- e.g. integer subtract could
be defined to assume predicated off inputs are replaced with 0 so a - b with a
predicated off would output -b).
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