[Libre-soc-bugs] [Bug 120] implement RISC-V FSGNJ instruction
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Sat Jun 18 20:08:20 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=120
Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:
What |Removed |Added
----------------------------------------------------------------------------
The table of|mnolan={amount=120, |mnolan={amount=100,
payments (in EUR)|submitted=2020-01-27, |submitted=2020-01-27,
for this task;|paid=2020-01-27} |paid=2020-01-27}
TOML format| |
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