[Libre-soc-bugs] [Bug 855] add libre-soc to kestrel

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=855

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
adding this new SPR is tricky, there are two techniques:

1) add to CoreState as a peer of DEC and TB. this requires hooking
   into how DEC and TB read from a State regfile port.

   complicated.

2) have the cached copy in the Trap pipeline which handles
   *all* exceptions/interrupts.

   in PowerDecode2 spot the read/write to the SPR, manually
   redirect the pipeline unit, and then add OP_MTSPR
   and OP_MFSPR to the trap pipeline

   this is already done for LDST (loadstore1.py)



also needs adding to sprs.csv

also needs qualifying as a "fast" spr in decoder/enums.py
(decoder/sprs.py i think)

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