[Libre-soc-bugs] [Bug 898] binutils svp64 objdump support

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=898

--- Comment #12 from Dmitry Selyutin <ghostmansd at gmail.com> ---
Yet another day of banging my head towards metaclasses wall, but again, a
success story!

1. We now have a really pretty print!
print(SVP64Instruction)
SVP64Instruction(major=(32, 33, 34, 35, 36, 37), prefix={(0, 1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
27, 28, 29, 30, 31), insn=(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31), major=(0,
1, 2, 3, 4, 5), pid=(7, 9), rm={(6, 8, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31), spr=(6, 8, 10, 11, 12, 13, 14,
15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31),
mmode=(6,), mask=(8, 10, 11), elwidth=(12, 13), ewsrc=(14, 15), subvl=(16, 17),
extra=(18, 19, 20, 21, 22, 23, 24, 25, 26), mode=(27, 28, 29, 30, 31),
extra2[0]=(18, 19), extra2[1]=(20, 21), extra2[2]=(22, 23), extra2[3]=(24, 25),
smask=(24, 25, 26), extra3[0]=(18, 19, 20), extra3[1]=(21, 22, 23),
extra3[2]=(24, 25, 26)}}, suffix={(32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62,
63), major=(32, 33, 34, 35, 36, 37)})

print(some_insn)
SVP64Instruction(0x54027a47d68f215, major=0x1f, prefix={0x54027a4,
insn=0x54027a4, major=0x1, pid=0x3, rm={0x27a4, spr=0x27a4, mmode=0x0,
mask=0x0, elwidth=0x0, ewsrc=0x0, subvl=0x0, extra=0x13d, mode=0x4,
extra2[0]=0x2, extra2[1]=0x1, extra2[2]=0x3, extra2[3]=0x2, smask=0x5,
extra3[0]=0x4, extra3[1]=0x7, extra3[2]=0x5}}, suffix={0x7d68f215, major=0x1f})


2. We now have a clear syntax to remap some field, as long as it is wrapped
with a class.
class RM(Fields):
    """SVP64 RM: https://libre-soc.org/openpower/sv/svp64/"""
    _: Field = range(24)
    spr: Field = _
    mmode: Field = (0,)
    mask: Field = range(1, 4)
    elwidth: Field = range(4, 6)
    ewsrc: Field = range(6, 8)
    subvl: Field = range(8, 10)
    extra: Field = range(10, 19)
    mode: Field = range(19, 24)
    extra2: Field[4] = (
        range(10, 12),
        range(12, 14),
        range(14, 16),
        range(16, 18),
    )
    smask: Field = range(16, 19)
    extra3: Field[3] = (
        range(10, 13),
        range(13, 16),
        range(16, 19),
    )

class Prefix(Fields):
    """SVP64 Prefix: https://libre-soc.org/openpower/sv/svp64/"""
    _: Field = range(32)
    insn: Field = _
    major: Major.remap(range(0, 6))
    pid: PID.remap((7, 9))
    rm: RM.remap((6, 8) + tuple(range(10, 32)))


3. Any proper field intended to be inherited should declare a magic field which
describes how the field is mapped in overall (exceptions: Fields base class,
Instruction base class). This grows from a limitation, since otherwise
class-level remap won't work; but, in fact, a nice bonus is that this mechanism
can be used if someone tries to remap field with scheme containing less entries
(e.g. if one remaps field of length 6 to new positions with 5 indices).

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