[Libre-soc-bugs] [Bug 236] Atomics Standard writeup needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=236

--- Comment #50 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #49)
> jacob if you can briefly summarise the discoveries from the atomics
> benchmarks specifically focussing on Power ISA that would help.

basically that the benchmarks require more work...the only thing of note that
I've discovered so far is x86 atomics (Ryzen 3900X) are a lot slower than
relaxed/acquire/release atomics on POWER9 (but not really seq-cst atomics) --
which is entirely expected since x86 atomics are almost all seq-cst due to
needing the LOCK prefix. AArch64 (which is what is more useful to compare to)
has not been tested yet. I just tested x86 because that's what my desktop is
and because x86 is widely available so is nice to have.

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