[Libre-soc-bugs] [Bug 683] New: possible precedence error in divw XLEN
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Fri Sep 3 08:43:19 BST 2021
https://bugs.libre-soc.org/show_bug.cgi?id=683
Bug ID: 683
Summary: possible precedence error in divw XLEN
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: PC
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl at lkcl.net
Reporter: lkcl at lkcl.net
CC: libre-soc-bugs at lists.libre-soc.org
NLnet milestone: ---
- dividend[0:31] <- (RA)[32:63]
- divisor[0:31] <- (RB) [32:63]
- if (((dividend = 0x8000_0000) &
- (divisor = [1]*32)) |
- (divisor = [0]*32)) then
- RT[0:63] <- undefined([0]*64)
+ dividend[0:(XLEN/2)-1] <- (RA)[XLEN/2:XLEN-1]
+ divisor[0:(XLEN/2)-1] <- (RB) [XLEN/2:XLEN-1]
+ if (((dividend = (0b1 || ([0b0] * ((XLEN/2)-1)))) &
+ (divisor = [1]*XLEN/2)) |
+ (divisor = [0]*XLEN/2)) then
+ RT[0:XLEN-1] <- undefined([0]*XLEN)
[1]*XLEN/2 *may* be being interpreted as:
([1]*XLEN)/2
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