[Libre-soc-bugs] [Bug 734] add Partitioned SimdSignal support for elwidth-based layouts (currently ElwidPartType)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=734

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=ieee754fpu.git;a=commitdiff;h=f4af452829a8bbe686a5ae34f1ddc362882c9d86

i have a feeling that PartitionedCat needs a redesign to take into
consideration the lengths of each individual element, from which,
in combination with the length of each output element, it becomes
possible to calculate the length of any missing bits, aka "padding".

these would explicitly be set to zero.

another way to do it would be to use targetted slices:
   out[start:end].eq(chunk)

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