[Libre-soc-bugs] [Bug 716] PartitionedSignal Slice and Part needed for __getitem__
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Sat Oct 16 02:26:31 BST 2021
https://bugs.libre-soc.org/show_bug.cgi?id=716
--- Comment #9 from Jacob Lifshay <programmerjake at gmail.com> ---
I added WIP code that will handle any combination of Slice and Cat, it can
reduce it all down to a single layer of muxes. it also supports assignment to
any combination of Slice and Cat of SimdSignals. I put it all in a swizzle.py
file, that handles arbitrary bit-swizzles:
https://git.libre-soc.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/part_swizzle/swizzle.py;h=44c1922f4893b03a1aa58f2225426191deadf037;hb=8692c384d1bab5a4dc86ccad5110c3db597b35a7
The basic idea is there's SwizzledSimdValue, a subclass of SimdSignal, that
tracks where each bit goes from the original Signals for every possible value
of mask/elwid (we really need to get elwid integrated into SimdSignal...), then
we have each SwizzledSimdValue instance independently construct it's .sig
member on-demand from the *original* Signals' bits, *instead of* from any other
SwizzledSimdValue.sig.
When a SwizzledSimdValue is assigned to, it uses a completely different
evaluation method: it constructs the full list of Signals that it's built out
of, and returns the assignments that would reassign those full signals to the
correct values.
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