[Libre-soc-bugs] [Bug 602] low performance bare minimum functionality SIMD emulator required

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=602

--- Comment #10 from vklr at vkten.in <vklr at vkten.in> ---
(In reply to Luke Kenneth Casson Leighton from comment #1)
> to be edited, who is doing which pages.  these are listed in ISA Manual v3.0B
> obtain from http://ftp.libre-soc.org
> 
> * JT: page 242 through to 246, LD/ST 
> * rwilbur: 246 to 252, vector pack/unpack
> * vklr:
> 
> TODO:
> 
> * Vector merge 253 to 255
> * Vector splat 256 to 257
> * Vector permute and select 258
> * vector select 259 
> * vector shift 260 to 264
> * vector extract 265
> * vector insert 266
> * vector int add 267 to 272 
> * vsx vec merge 778
> * vsx vec permute 779 to 780
> * vsx vec shiftleft 781
> * vsx vec splat 781
> 
> 
> 
> 
> 
> format must be readable by pagereader.py
> https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/decoder/pseudo/
> pagereader.py;hb=HEAD

This link is not existent. In git checkout also I can't find it.
Is this bug work still relevant?

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