[Libre-soc-bugs] [Bug 558] gcc SV intrinsics concept

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Jan 11 22:04:12 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=558

--- Comment #41 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #40)
> I think that CRs should be handled entirely by the gcc backend, they will
> have mask values allocated to them automatically. In the gcc frontend, masks
> are just bitvectors (basically a uint64_t with a different type).
> 
> masks are generated by using compare intrinsics and by using bit-wise logic
> ops on masks. masks can be cast to/from integers.
> 
> the cr logic ops and the cr from int and cr to int ops are generated
> automatically by the instruction selector and by the register allocator.

this should be relatively easy since all you need to do is add the proper
instructions for the generic register move ops generated by the register
allocator:
move bitvector from int to cr
move bitvector from cr to int

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